Imaging Atomic Scale Dynamics on III-V Nanowire Surfaces during Electrical Operation

Summary, in English

As semiconductor electronics keep shrinking, functionality depends on individual atomic scale surface and interface features that may change as voltages are applied. In this work we demonstrate a novel device platform that allows scanning tunneling microscopy (STM) imaging with atomic scale resolution across a device simultaneously with full electrical operation. The platform presents a significant step forward as it allows STM to be performed everywhere on the device surface and high temperature processing in reactive gases of the complete device. We demonstrate the new method through proof of principle measurements on both InAs and GaAs nanowire devices with variable biases up to 4 V. On InAs nanowires we observe a surprising removal of atomic defects and smoothing of the surface morphology under applied bias, in contrast to the expected increase in defects and electromigration-related failure. As we use only standard fabrication and scanning instrumentation our concept is widely applicable and opens up the possibility of fundamental investigations of device surface reliability as well as new electronic functionality based on restructuring during operation.