Your browser has javascript turned off or blocked. This will lead to some parts of our website to not work properly or at all. Turn on javascript for best performance.

The browser you are using is not supported by this website. All versions of Internet Explorer are no longer supported, either by us or Microsoft (read more here: https://www.microsoft.com/en-us/microsoft-365/windows/end-of-ie-support).

Please use a modern browser to fully experience our website, such as the newest versions of Edge, Chrome, Firefox or Safari etc.

Portrait of Erik Lind; Photo: Kennet Ruona

Erik Lind

Professor, Coordinator Nanoelectronics & Nanophotonics

Portrait of Erik Lind; Photo: Kennet Ruona

Vertical nanowire III–V MOSFETs with improved high-frequency gain

Author

  • Olli-Pekka Kilpi
  • Markus Hellenbrand
  • Johannes Svensson
  • Erik Lind
  • Lars-Erik Wernersson

Summary, in English

High-frequency performance of vertical InAs/InGaAs heterostructure nanowire MOSFETs on Si is demonstrated for the first time for a gate-last configuration. The device architecture allows highly asymmetric capacitances, which increases the power gain. A device with Lg = 120 nm demonstrates fT = 120 GHz, fmax = 130 GHz and maximum stable gain (MSG) = 14.4 dB at 20 GHz. These metrics demonstrate the state-of-the-art performance of vertical nanowire MOSFETs.

Department/s

  • Nano Electronics
  • Department of Electrical and Information Technology
  • NanoLund

Publishing year

2020-04

Language

English

Pages

669-671

Publication/Series

Electronics Letters

Volume

56

Issue

13

Document type

Journal article

Publisher

IEE

Topic

  • Nano Technology

Status

Published

Research group

  • Nano Electronics

ISBN/ISSN/Other

  • ISSN: 1350-911X