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Portrait of Erik Lind; Photo: Kennet Ruona

Erik Lind

Professor, Coordinator Nanoelectronics & Nanophotonics

Portrait of Erik Lind; Photo: Kennet Ruona

Circuits and devices with integrated VFETs and RTDs


  • Lars-Erik Wernersson
  • Erik Lind
  • Peter Lindström
  • Pietro Andreani

Summary, in English

We have realised a new technology for the integration of VFETs and RTDs. For these tunnelling transistors (so called resonant tunnelling permeable base transistors) we have developed large signal models which have been implemented in a Cadence simulation environment. The DC I-V characteristics are reproduced to a very high degree in these models. The models are further used for simulations of the behaviour of simple small-scale circuits including resonant tunnelling transistors. Examples of circuits studied are a monostable-bistable logic element and a ternary quantiser, where the later is based on a new 3D architecture of RTDs and VFETs


  • Solid State Physics
  • Department of Electrical and Information Technology

Publishing year







2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)

Document type

Conference paper


IEEE - Institute of Electrical and Electronics Engineers Inc.


  • Electrical Engineering, Electronic Engineering, Information Engineering


  • VFETs
  • large signal models
  • Cadence simulation environment
  • DC I-V characteristics
  • monostable-bistable logic element
  • small-scale circuits
  • 3D architecture
  • ternary quantiser
  • RTDs
  • resonant tunnelling permeable base transistors




  • ISBN: 0-7803-7448-7