Your browser has javascript turned off or blocked. This will lead to some parts of our website to not work properly or at all. Turn on javascript for best performance.

The browser you are using is not supported by this website. All versions of Internet Explorer are no longer supported, either by us or Microsoft (read more here: https://www.microsoft.com/en-us/microsoft-365/windows/end-of-ie-support).

Please use a modern browser to fully experience our website, such as the newest versions of Edge, Chrome, Firefox or Safari etc.

Portrait of Ivan Maximov. Photo: Kennet Ruona

Ivan Maximov

Associate Professor, Coordinator Exploratory Nanotechnology

Portrait of Ivan Maximov. Photo: Kennet Ruona

A sequential logic device realized by integration of in-plane gate transistors in InGaAs/InP

Author

  • Jie Sun
  • Daniel Wallin
  • Yuhui He
  • Ivan Maximov
  • Hongqi Xu

Summary, in English

An integrated nanoelectronic circuit is fabricated from a high-mobility In0.75Ga0.25As/InP heterostructure. The manufactured device comprises two double in-plane gate transistors with a current channel of 1.1 mu m in length and 100 nm in width. The two transistors are coupled to each other in a configuration that the source of one transistor is directly connected with one in-plane gate of the other transistor. Electrical measurements reveal that this device functions as an SR (set-reset) latch (a sequential logic device) with a gain of similar to 4 in the logic swing at room temperature. The demonstrated device provides a simple circuit design for SR latches.

Department/s

  • Solid State Physics

Publishing year

2008

Language

English

Publication/Series

Applied Physics Letters

Volume

92

Issue

1

Document type

Journal article

Publisher

American Institute of Physics (AIP)

Topic

  • Condensed Matter Physics

Status

Published

ISBN/ISSN/Other

  • ISSN: 0003-6951